HOVALAAG Processor Documentation The processor in HOVALAAG is the █████ designed by ████████ █████ Technologies in 19██. It is a Harvard architecture VLIW processor with no data storage, only instruction storage. The original CPU could only address 64 instruction words; HOVALAAG uses the later ██ variant which allows 256 program words (although only the first 64 can be branched to with "short" labels). Each instruction is encoded in 32 bits as follows:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ALU | A | B | C | D | W | F | PC | O | IO | X | K | L |
0000 | 0 | constant zero (not the value of K) |
0001 | -A | negated value of A register |
0010 | B | value of B register |
0011 | C | value of C register |
0100 | A>>1 | signed right bitshift of A; see notes below |
0101 | A+B | sum of A and B registers |
0110 | B-A | difference of B and A registers |
0111 | A+B+F | sum of A and B, and carry from 1-bit F register |
1000 | B-A-F | difference of B and A, and borrow from 1-bit F register |
1001 | A|B | bitwise OR of A and B |
1010 | A&B | bitwise AND of A and B |
1011 | A^B | bitwise XOR of A and B |
1100 | ~A | bitwise inverse of A |
00 | A is unchanged | |
01 | A=ALU | A is loaded from the ALU computation |
10 | A=D | A is loaded from register D |
11 | A=IN# | A is loaded from input stream 1 or 2, depending on the value of IO |
00 | B is unchanged | |
01 | B=ALU | B is loaded from the ALU computation |
10 | B=A | B is loaded from register A |
11 | B=K | B is loaded from the constant K in the instruction word |
00 | C is unchanged | |
01 | C=ALU | C is loaded from the ALU computation |
10 | DEC | compute C=C-1 |
11 | DECNZ | compute C=C-1; if the result is non-zero, branch to address L |
0 | D is unchanged | |
1 | D=A | D is loaded from A |
00 | W is unchanged | |
01 | W=ALU | W is loaded from the ALU computation |
10 | W=A | W is loaded from register A |
11 | W=K | W is loaded from constant K in the instruction word |
00 | F is unchanged | |
01 | F=ZERO(ALU) | F is 1 iff the ALU computation is zero |
10 | F=NEG(ALU) | F is 1 iff the ALU computation is negative |
11 | F=POS(ALU) | F is 1 iff the ALU computation is positive |
00 | execution proceeds to the next instruction | |
01 | JMP | unconditional branch to instruction L |
10 | JMPT | branch to instruction L if F is 1 |
11 | JMPF | branch to instruction L if F is 0 |
0 | no output | |
1 | OUT#=W | output the value in W to output stream #IO |
0 | IN1,OUT1 | use input and/or output stream 1 |
1 | IN2,OUT2 | use input and/or output stream 2 |